VLSI Design

  1. Verification and Testing
    1. The Importance of Verification
      1. Cost of Errors
        1. Verification Gap
          1. Verification in the Design Flow
            1. Verification Planning
            2. Verification Methodologies
              1. Simulation-Based Verification
                1. Functional Simulation
                  1. RTL Simulation
                    1. Behavioral Simulation
                    2. Gate-Level Simulation
                      1. Timing Simulation
                        1. Power-Aware Simulation
                        2. Mixed-Signal Simulation
                        3. Formal Verification
                          1. Equivalence Checking
                            1. Combinational Equivalence
                              1. Sequential Equivalence
                              2. Model Checking
                                1. Temporal Logic
                                  1. Property Checking
                                  2. Theorem Proving
                                  3. Emulation and Prototyping
                                    1. Hardware Emulation
                                      1. FPGA Prototyping
                                      2. Coverage Metrics
                                        1. Code Coverage
                                          1. Line Coverage
                                            1. Branch Coverage
                                              1. Expression Coverage
                                              2. Functional Coverage
                                                1. Covergroups
                                                  1. Cross Coverage
                                                  2. Assertion Coverage
                                                2. Verification Languages and Methodologies
                                                  1. SystemVerilog for Verification
                                                    1. Testbench Architecture
                                                      1. Constrained Random Testing
                                                        1. Assertions
                                                        2. Universal Verification Methodology
                                                          1. Verification IP
                                                          2. Physical Verification
                                                            1. Design Rule Check
                                                              1. Width Violations
                                                                1. Spacing Violations
                                                                  1. Enclosure Violations
                                                                    1. Density Violations
                                                                    2. Layout vs Schematic
                                                                      1. Netlist Extraction
                                                                        1. Netlist Comparison
                                                                          1. Device Recognition
                                                                          2. Electrical Rule Check
                                                                            1. Antenna Violations
                                                                              1. Well Continuity
                                                                                1. Power/Ground Connectivity
                                                                                2. Parasitic Verification
                                                                                3. Design for Testability
                                                                                  1. Fault Models
                                                                                    1. Stuck-at Faults
                                                                                      1. Bridging Faults
                                                                                        1. Delay Faults
                                                                                          1. IDDQ Faults
                                                                                          2. Testability Measures
                                                                                            1. Controllability
                                                                                              1. Observability
                                                                                                1. Fault Coverage
                                                                                                2. Scan-Based Design
                                                                                                  1. Scan Chain Architecture
                                                                                                    1. Scan Insertion
                                                                                                      1. Scan Compression
                                                                                                        1. Scan Patterns
                                                                                                        2. Automatic Test Pattern Generation
                                                                                                          1. D-Algorithm
                                                                                                            1. PODEM Algorithm
                                                                                                              1. FAN Algorithm
                                                                                                              2. Built-In Self-Test
                                                                                                                1. Logic BIST
                                                                                                                  1. LFSR-Based Patterns
                                                                                                                    1. MISR-Based Response
                                                                                                                    2. Memory BIST
                                                                                                                      1. March Algorithms
                                                                                                                        1. Checkerboard Patterns
                                                                                                                      2. Boundary Scan
                                                                                                                        1. IEEE 1149.1 Standard
                                                                                                                          1. Boundary Scan Architecture
                                                                                                                            1. JTAG Interface
                                                                                                                            2. At-Speed Testing
                                                                                                                              1. Delay Testing Techniques

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                                                                                                                            5. Physical Design

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                                                                                                                            7. Timing and Power Analysis