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VLSI Design
1. Introduction to VLSI
2. Fundamentals of MOS Transistors
3. CMOS Logic and Circuit Design
4. The VLSI Design Process
5. Physical Design
6. Verification and Testing
7. Timing and Power Analysis
8. Memory Design
9. System-on-Chip Design
10. Signal Integrity and Interconnect
11. Advanced VLSI Topics
Fundamentals of MOS Transistors
Semiconductor Physics Basics
Crystal Structure
Energy Bands
Doping and Carrier Concentration
PN Junctions
The Metal-Oxide-Semiconductor Structure
MOS Capacitor Structure
Energy Band Diagrams
Flat Band Condition
Accumulation
Depletion
Inversion
Threshold Voltage Concept
Oxide Charges and Interface States
Types of MOSFETs
n-channel MOSFET (NMOS)
Structure and Operation
Enhancement Mode
Depletion Mode
p-channel MOSFET (PMOS)
Structure and Operation
Enhancement Mode
Depletion Mode
Modes of Operation
Cutoff Region
Conditions for Cutoff
Subthreshold Conduction
Linear (Triode) Region
Conditions for Linear Operation
Resistance Characteristics
Saturation Region
Conditions for Saturation
Current Saturation Mechanism
I-V Characteristics
Output Characteristics
Transfer Characteristics
Channel Formation and Inversion
Temperature Effects
Process Variations
The MOS Transistor as a Switch
On-State and Off-State Behavior
Switching Speed
Applications in Logic Circuits
Second-Order Effects
Channel-Length Modulation
Body Effect (Substrate Bias Effect)
Velocity Saturation
Mobility Degradation
Hot Carrier Effects
Short-Channel Effects
Drain-Induced Barrier Lowering (DIBL)
Threshold Voltage Roll-Off
Punch-Through
Narrow-Width Effects
Gate-Induced Drain Leakage (GIDL)
MOS Device Capacitances
Gate Capacitance
Overlap Capacitance
Intrinsic Capacitance
Fringing Capacitance
Junction Capacitance
Source/Drain to Substrate Capacitance
Voltage Dependence
CMOS Technology
CMOS Process Overview
The n-well Process
The p-well Process
Twin-tub Process
Silicon-on-Insulator (SOI)
CMOS Fabrication Steps
Substrate Preparation
Well Formation
Gate Oxide Growth
Polysilicon Deposition
Source/Drain Formation
Metallization
Advantages of CMOS Technology
CMOS Scaling Challenges
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3. CMOS Logic and Circuit Design