VLSI Design

  1. The VLSI Design Process
    1. System Specification
      1. Defining Requirements and Constraints
        1. Functional Requirements
          1. Performance Constraints
            1. Power Constraints
              1. Area Constraints
                1. Cost Constraints
                2. Market Analysis
                  1. Technology Selection
                    1. Design Trade-offs
                    2. Architectural Design
                      1. High-Level System Partitioning
                        1. Defining Major Functional Blocks
                          1. Data Path and Control Path Design
                            1. Memory Hierarchy Design
                              1. Interface Specifications
                                1. Performance Modeling
                                2. Logic and Functional Design
                                  1. Hardware Description Languages
                                    1. Verilog
                                      1. Syntax and Structure
                                        1. Behavioral Modeling
                                          1. Structural Modeling
                                            1. Dataflow Modeling
                                              1. Simulation and Synthesis
                                                1. Testbench Development
                                                2. VHDL
                                                  1. Syntax and Structure
                                                    1. Entity and Architecture
                                                      1. Processes and Signals
                                                        1. Simulation and Synthesis
                                                          1. Package and Library Concepts
                                                          2. SystemVerilog
                                                            1. Enhancements over Verilog
                                                              1. Object-Oriented Features
                                                                1. Verification Features
                                                              2. Register-Transfer Level Design
                                                                1. RTL Abstraction
                                                                  1. RTL Coding Guidelines
                                                                    1. Finite State Machines
                                                                      1. Datapath Design
                                                                        1. Control Unit Design
                                                                        2. High-Level Synthesis
                                                                          1. Behavioral Synthesis
                                                                            1. Scheduling and Binding
                                                                              1. Resource Allocation
                                                                            2. Logic Synthesis
                                                                              1. Translating RTL to Gate-Level Netlist
                                                                                1. Technology Mapping
                                                                                  1. Optimization Techniques
                                                                                    1. Area Optimization
                                                                                      1. Speed Optimization
                                                                                        1. Power Optimization
                                                                                          1. Multi-Objective Optimization
                                                                                          2. Synthesis Constraints
                                                                                            1. Synthesis Scripts and Flows
                                                                                            2. Circuit Design
                                                                                              1. Custom Circuit Design
                                                                                                1. Full-Custom Layout
                                                                                                  1. Schematic Entry
                                                                                                    1. Circuit Simulation
                                                                                                    2. Standard Cell Design
                                                                                                      1. Standard Cell Libraries
                                                                                                        1. Cell Characterization
                                                                                                          1. Library Development
                                                                                                          2. Analog and Mixed-Signal Design
                                                                                                          3. Physical Design
                                                                                                            1. Floorplanning
                                                                                                              1. Block Placement
                                                                                                                1. Power Planning
                                                                                                                  1. I/O Planning
                                                                                                                  2. Placement
                                                                                                                    1. Global Placement
                                                                                                                      1. Detailed Placement
                                                                                                                        1. Legalization
                                                                                                                        2. Clock Tree Synthesis
                                                                                                                          1. Routing
                                                                                                                            1. Global Routing
                                                                                                                              1. Detailed Routing
                                                                                                                              2. Physical Optimization
                                                                                                                              3. Verification and Validation
                                                                                                                                1. Functional Verification
                                                                                                                                  1. Timing Verification
                                                                                                                                    1. Physical Verification
                                                                                                                                      1. System-Level Verification
                                                                                                                                      2. Fabrication and Testing
                                                                                                                                        1. Wafer Fabrication Process
                                                                                                                                          1. Packaging Techniques
                                                                                                                                            1. Testing Strategies
                                                                                                                                              1. Yield Analysis

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                                                                                                                                            3. CMOS Logic and Circuit Design

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                                                                                                                                            5. Physical Design