Digital Logic Design

2.

Boolean Algebra and Logic Gates

2.1.

Axiomatic Definition of Boolean Algebra

2.1.1.

Postulates and Basic Theorems

2.1.1.1.

2.1.1.2.

2.1.1.3.

2.1.1.4.

2.1.2.

Duality Principle

2.1.2.1.

Statement of Duality

2.1.2.2.

Application in Theorems

2.2.

Basic Properties of Boolean Algebra

2.2.1.

Commutative Laws

2.2.2.

Associative Laws

2.2.3.

Distributive Laws

2.2.4.

Identity Elements

2.2.5.

Inverse Elements

2.2.6.

2.2.7.

2.2.8.

2.2.9.

2.3.

DeMorgan's Theorems

2.3.1.

2.3.2.

2.3.3.

Application in Circuit Simplification

2.3.4.

Proof and Verification

2.4.

Boolean Functions

2.4.1.

Representation with Truth Tables

2.4.2.

Representation with Algebraic Expressions

2.4.3.

Conversion between Representations

2.4.4.

Function Completeness

2.4.5.

Literal and Variable Count

2.5.

Canonical and Standard Forms

2.5.1.

Minterms and Maxterms

2.5.1.1.

Definition of Minterm

2.5.1.2.

Definition of Maxterm

2.5.1.3.

Relationship between Minterms and Maxterms

2.5.2.

Sum of Products

2.5.2.1.

Standard SOP Form

2.5.2.2.

Canonical SOP Form

2.5.2.3.

Conversion to SOP

2.5.3.

Product of Sums

2.5.3.1.

Standard POS Form

2.5.3.2.

Canonical POS Form

2.5.3.3.

Conversion to POS

2.5.4.

Conversion between SOP and POS

2.6.

2.6.1.

2.6.1.1.

2.6.1.1.1.

Symbol and Truth Table

2.6.1.1.2.

Boolean Expression

2.6.1.1.3.

2.6.1.2.

2.6.1.2.1.

Symbol and Truth Table

2.6.1.2.2.

Boolean Expression

2.6.1.2.3.

2.6.1.3.

2.6.1.3.1.

Symbol and Truth Table

2.6.1.3.2.

Boolean Expression

2.6.1.3.3.

2.6.2.

Universal Gates

2.6.2.1.

2.6.2.1.1.

Symbol and Truth Table

2.6.2.1.2.

Boolean Expression

2.6.2.1.3.

2.6.2.1.4.

Universality of NAND

2.6.2.2.

2.6.2.2.1.

Symbol and Truth Table

2.6.2.2.2.

Boolean Expression

2.6.2.2.3.

2.6.2.2.4.

Universality of NOR

2.6.3.

Exclusive Gates

2.6.3.1.

2.6.3.1.1.

Symbol and Truth Table

2.6.3.1.2.

Boolean Expression

2.6.3.1.3.

2.6.3.2.

2.6.3.2.1.

Symbol and Truth Table

2.6.3.2.2.

Boolean Expression

2.6.3.2.3.

2.6.4.

Multi-Input Gates

2.6.4.1.

Extension to Multiple Inputs

2.6.4.2.

Associativity in Multi-Input Gates

2.6.5.

Logic Symbols and Standards

2.6.5.1.

IEEE Standard Symbols

2.6.5.2.

Traditional Symbols

2.6.5.3.

Truth Table Construction

2.7.

Digital Logic Families

2.7.1.

Transistor-Transistor Logic

2.7.1.1.

Structure and Operation

2.7.1.2.

Electrical Characteristics

2.7.1.3.

2.7.2.

Complementary Metal-Oxide-Semiconductor

2.7.2.1.

Structure and Operation

2.7.2.2.

Electrical Characteristics

2.7.2.3.

Power Consumption

2.7.3.

Emitter-Coupled Logic

2.7.3.1.

Structure and Operation

2.7.3.2.

Speed Characteristics

2.7.4.

Electrical Characteristics

2.7.4.1.

Fan-in and Fan-out

2.7.4.2.

Propagation Delay

2.7.4.3.

Rise and Fall Times

2.7.4.4.

2.7.4.5.

Power Dissipation

2.7.4.6.

Operating Temperature Range

2.7.5.

Interfacing Between Logic Families

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1. Foundations of Digital Logic

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3. Gate-Level Minimization