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Computer Science
Programming
LLVM Compiler Backend
1. Introduction to Compiler Backends and LLVM
2. LLVM Intermediate Representation
3. Target Description Infrastructure
4. Instruction Selection
5. Register Allocation
6. Instruction Scheduling
7. Code Emission and Finalization
8. Advanced Backend Features
9. Backend Development
Register Allocation
Register Allocation Problem
Virtual to Physical Mapping
Resource Constraints
Optimization Objectives
Fundamental Concepts
Liveness Analysis
Live Variable Analysis
Live Range Computation
Live Intervals
Interval Construction
Interval Splitting
Interval Merging
Interference Analysis
Interference Graph
Graph Coloring
Allocation Strategies
Spilling Mechanisms
Spill Code Generation
Spill Slot Assignment
Reload Insertion
Coalescing Techniques
Move Elimination
Register Merging
Copy Propagation
Rematerialization
Value Recomputation
Cost Analysis
LLVM Register Allocators
Fast Allocator
Linear Scan Algorithm
Performance Characteristics
Greedy Allocator
Priority-Based Selection
Spill Cost Calculation
Live Range Splitting
PBQP Allocator
Graph-Based Formulation
Constraint Modeling
Post-Allocation Processing
Two-Address Conversion
Prologue Insertion
Epilogue Insertion
Stack Slot Assignment
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4. Instruction Selection
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6. Instruction Scheduling