Microarchitectural Attacks and Security

2.

Cache-Based Side Channel Attacks

2.1.

Cache Attack Fundamentals

2.1.1.

Cache State Observation Techniques

2.1.2.

Timing Measurement Methods

2.1.3.

Cache Line Granularity Effects

2.1.4.

Cross-Core vs Same-Core Attacks

2.2.

Access-Driven Attack Methods

2.2.1.

Prime+Probe Attacks

2.2.1.1.

Attack Setup Phase

2.2.1.2.

Priming Cache Sets

2.2.1.3.

Victim Execution Phase

2.2.1.4.

Probing and Measurement

2.2.1.5.

Noise Reduction Techniques

2.2.1.6.

Multi-Set Prime+Probe

2.2.2.

Evict+Time Attacks

2.2.2.1.

Cache Eviction Strategies

2.2.2.2.

Timing Measurement Setup

2.2.2.3.

Statistical Analysis Methods

2.2.2.4.

Attack Limitations

2.3.

Trace-Driven Attack Methods

2.3.1.

Flush+Reload Attacks

2.3.1.1.

Shared Memory Requirements

2.3.1.2.

Cache Line Flushing Techniques

2.3.1.3.

Reload Timing Measurement

2.3.1.4.

Attack Synchronization

2.3.1.5.

Cross-Process Applications

2.3.2.

Evict+Reload Attacks

2.3.2.1.

Eviction Set Construction

2.3.2.2.

Reload Phase Implementation

2.3.2.3.

Comparison with Flush+Reload

2.3.3.

Flush+Flush Attacks

2.3.3.1.

Flush Timing Variations

2.3.3.2.

Detection Evasion Properties

2.3.3.3.

Implementation Challenges

2.4.

Advanced Cache Attack Techniques

2.4.1.

Cross-Core Cache Attacks

2.4.1.1.

Shared Cache Exploitation

2.4.1.2.

Inter-Core Communication

2.4.1.3.

Synchronization Challenges

2.4.2.

Cache Template Attacks

2.4.2.1.

Template Construction

2.4.2.2.

Pattern Matching Techniques

2.4.3.

Automated Cache Attack Tools

2.4.3.1.

Attack Automation Frameworks

2.4.3.2.

Parameter Optimization

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1. Foundations of Microarchitectural Security

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3. Transient Execution Attacks